1. Field of the Invention
Generally, the present disclosure relates to the field of integrated circuits, and, in particular, to integrated circuits wherein die seals are used for protecting the integrated circuit from environmental influences.
2. Description of the Related Art
Integrated circuits include a number of individual circuit elements, such as, for example, transistors, capacitors, diodes and resistors, which are interconnected by means of electrically conductive metal lines formed in a dielectric material. The electrically conductive metal lines may be provided in a plurality of interconnect layers that are stacked on top of each other above a substrate. Metal lines in different interconnect layers may be electrically connected with each other by means of contact vias that are filled with metal. In and on the substrate, field effect transistors and, optionally, other circuit elements, such as capacitors, diodes and resistors, may be formed. Contact holes filled with an electrically conductive metal may be used for connecting the circuit elements with electrically conductive metal lines.
For forming the electrically conductive metal lines, damascene techniques may be employed. In damascene techniques, trenches and contact vias are formed in an intermetal dielectric, which may include silicon dioxide and/or a low-k material having a smaller dielectric constant than silicon dioxide. In the trenches and contact vias, a diffusion barrier layer may be formed. After the formation of the diffusion barrier layer, the trenches and contact vias may be filled with a metal such as copper or a copper alloy. This may be done by means of electroplating for depositing the metal and chemical mechanical polishing for removing portions of the metal deposited outside the trenches and contact vias.
For protecting the electrically conductive metal lines and other features in an integrated circuit from environmental influences, such as moisture, die seals may be employed. A die seal may include trenches filled with a metal that may be substantially the same metal as the metal from which the electrically conductive metal lines are formed. The trenches may be provided on top of each other in the interconnect layers so that a “wall” of metal is formed. The die seal may have a rectangular configuration that encloses the electrically conductive metal lines.
Issues that can occur in integrated circuits as described above may include a formation of defects and/or delaminations in interconnect layers that may be associated with leakages of a die seal. Relatively small defects and/or delaminations may remain undetected in tests that are performed during and/or after the manufacturing of the integrated circuits, but they can lead to a relatively quick failure of products wherein the integrated circuits are included.
In view of the situation described above, the present disclosure provides semiconductor structures and methods which may help to substantially avoid or at least reduce the occurrence of issues as described above.